iCD Technical Articles - Keyword Index
AC Coupling
High-Speed Serial Link Design (SERDES)
AC/DC are not only a Rock Band
The Coupling Coup
The Key to Electromagnetic Energy Propagation
The Interaction of Electromagnetic Fields
AC Impedance
Impact of PDN Impedance on EMI
The Ten Fundamental Rules of HSD Pt 3
The Target Impedance Approach to PDN Design
PDN - Decoupling Capacitor Placement
PDN Planning and Capacitor Selection Part 1
Mixed Digital-Analog Technologies
Autorouters
Why Autorouters Don't Work - The Mindset!
Routing Strategies for HSD
Routing Techniques for Complex Designs
Routing Strategies to Minimize Radiation
Bandwidth
The Impact of Rise Time on Bandwidth
Stackup Planning Pt6 - Impedance Variables
The Frequency Domain
Plane Cavity Resonance
Material Selection for SERDES Design
When Legacy Products No Longer Perform
BGA
Dampening Plane Resonance with Termination
Stackup Planning - 3 decades of Innovation
Design Rules & DFM for High-Speed Design
Mastering "Black Magic"
Broadside Coupling
Stackup Planning and the Fabrication Process
Plan B - Post-Layout Simulation
Controlling the Beast
Containing Electromagnetic Fields in Wireless PCB Design
Buildup Layers
Mythbusting - There are no on-way trips
Designing for the SAP PCB Fabrication Process
Bypass Capacitors
Split planes - Reprise
Capacitance
PDN Planning and Capacitor Selection Part 2
Curse of the Golden Board
PDN Trends and Challenges
Clocks
Common Mode Radiation
Alternative Series Termination Techniques
DDR3/4 Fly-by vs T-topology Routing
Pre-Layout Simulation
Practical Signal Integrity
Plane Crazy Part 2
Losing a Bit of Memory
Critical Placement
Design for EMC
Coax Cables
Fly-over Technology - When it all gets too fast
Common Mode Signaling
Uncommon Sense - Differential Pairs
The Ten Fundamental Rules of HSD Pt 2
Concurrent Design
Concurrent Design Cuts Development Costs and Time
Beyond Co-design
Coplanar Waveguides
Microstrip Coplanar Waveguides
Not All Substrates are Created Equal
Copper Pours
Copper Pours in High-Speed Design
Ground Pours: To Pour or Not to Pour?
How to Handle the Dreaded Danglers Pt1
How to Handle the Dreaded Danglers Pt2
Top Gear - PADS Professional Road Test
Effects of Surface Roughness on High-speed PCBs
Core
Stackup Planning Part 1
It's a Material World
Coupling
Stackup Configurations to Mitigate Crosstalk
Stackup Planning Part 5
Crosstalk Margins
Return Path Discontinuities
Controlled Impedance Design
Signal Integrity - Part 3 of 3
Skewed Again
Crosstalk
Simulation Slashes Iterations
Interconnect Impedance
The Ten Fundamental Rules of HSD Pt 5
HyperLynx DRC Review
Switchbacks in Tuned Routing
Stackup Planning Part 3
Signal Integrity - Part 2 of 3
A New Slant on Matched-Length Routing
Cross-probing
The Ten Fundamental Rules of HSD Pt 4
Interactive Placement and Routing Strategies
Daisy Chain
Designing With DDR
DDR3/4 Fly-by Termination and Routing
Data Coding
DC Blocking
DDR Memory
Reflecting on Reflections
Matched Length does not equal Matched Delay
Differential Pair Routing
PCB Design Techniques for DDR, DDR2 & DDR3, Part 1
PCB Design Techniques for DDR, DDR2 & DDR3, Part 2
Decoupling Capacitors
The Proximity Effect
Delay
Signal Flight Time Variance in Multilayer PCBs
New Functionality Improves Productivity
Design Constraints
High-Speed PCB Design Constraints
The Ten Fundamental Rules of HSD Pt 1
The Need for Speed - Strategies for Design Efficiency
High Voltage PCB Design Constraints
Design for Manufacturability (DfM)
The Key to Product Reliability
Design for Profit
Design Reuse
Design Rules
Dielectric Constant (Dk, Er)
Select Dielectric Materials with Precision
Material Selection for Digital Design
The Wavelength of Electromagnetic Energy
Generic Multilayer PCB Specification
The Impact of No-Clean Flux Residue on Signal Integrity
Dielectric Materials
iCD Dielectric Materials Library
Dielectric Loss
Transmission Line Losses
Differential Mode Signaling
Differential Pairs
2D Field Solver-An Essential Tool for HSD
Predicting and Measuring Impedance
Signal Integrity - Part 1 of 3
Dissipation Factor (Df)
Distributed System
Lumped Element to Distributed System
When Do Traces Become Transmission Lines
Drivers
EDA Tool Integration
Electromagnetic Compliancy (EMC)
Fringing Fields
Plane Crazy Part 1
Stackup Planning Part 2
Electromagnetic Susceptibility (EMS)
Controlling Emissions and Improving EMC
Electromagnetic Fields
Forget What You Were Taught
Transmission Lines
Electromagnetic Fields, Part 1
Electromagnetic Fields, Part 2
Faster Than a Speeding Bullet
The Dark Side - Return of the Signal
Entanglement - The Holy Grail of High-speed Design
Ethernet
Eye Diagram
The Eye Diagram
Fiber Weave Effect
Field Solver
Flight Time
Fly-by Termination and Routing
Effective Routing of Multiple Loads
Fly-Over Technology
Flux - no clean
Impact of No-clean Flux on Signal Integrity
FPGA
FPGA PCB Design Challenges
Frequency Domain
Ground
The Dumping Ground
Ground Bounce
Harmonics
IBIS Models
Transmission Line Modeling
Impedance Matching - Terminations
Impedance
Rock Steady Design
Inductance
Stackup Planning Part 4
Interactive Routing
Interconnects
Next Gen PCBs
IPC Design Standards
Knee (Nyquist) Frequency
Land Pattern
Loop Inductance
Loss
Lumped Element
Matched Delay/Length
MCAD
The Rise of the Independent Engineer
Microstrip
Mixed Signal
The Plain Truth About Plane Jumpers
Multidrop
Transmission Line Termination
Noise
Placement
Artificial Intelligence in EDA Tools
Planar Capacitance
The Perfect Stackup - for High-Speed Design
Plating Finishes
Surface Finishes for High-Speed Design
Power Distribution Network (PDN)
Learning the Curve
Power Distribution Network Planning
Prepreg
Product Reviews
Marketing in the Maturing EDA Industry
Propagation
Proximity Effect
Reference Planes
Reflections
Reliability
Resistance
Return Signal Path
Ringing
Rise Time
Routing Strategies
Embedded Signal Routing
SDRAM Memory
Serial Link (SERDES)
Semi-Additive Process (SAP)
Shielding
Signal Integrity
The Impact of Filled Vias on Thermal and Signal Integrity
Simultaneous Switching Noise (SSN)
Simulation
Post Mortem Simulation
Multilayer PCB Simulation
Intro to Board-Level Simulation and the PCB Design Process
Single Ended Traces
Skew
Skin Effect
Solder Mask
S-parameters
Split Planes
Split Planes in Multilayer PCBs
Stackups
Multilayer PCB Stackup Planning
Stripline
Stubs
Substrates
Substrate Integrated Waveguides
Surface Roughness
Switchbacks
Synchronous Buses
Time Domain Reflectometer (TDR)
Timing
Termination
Test Coupons
Thermal Analysis
Time Domain
Topology
T-Topology Routing
Velocity of Propagation
Vias
Vector Network Analyzer (VNA)
Wavelength
